For a receiver detecting data loaded in spread spectrum signal transmitted in a GNSS (Global Navigation Satellite System; such as GPS, GLONASS, GALILEO system and the like), there are three domains should be considered: visible satellite ID, Doppler frequency, and code phase. In a cold start state, such as in the beginning when the receiver starts to work, the visible satellite ID, the recent Doppler frequency and the code phase are all unknown. Accordingly, it is necessary to try each possible combination of these three domains. One combination of a specific satellite ID, a specific Doppler frequency, and a specific code phase is referred to a “hypothesis”. For a satellite SVx, if there are M possible Doppler frequencies DF0, DF1, . . . DFm−1, and N code phases CP0, CP1, . . . . CPn−1 to be tried, then there are M×N hypotheses, as shown in FIG. 1. As can be deduced, when there are X satellites SV0, SV1, . . . , SVx−1, the total number of hypotheses will be X×M×N, as shown in FIG. 2. In the worst case, X×M×N correlation trials should be done to acquire a specific GPS signal. In some applications, half or one fourth chip code spacing is necessary to achieve higher tracking accuracy. Therefore, an extra factor P is introduced. When the chip code spacing is half chip, P=2; when the chip code spacing is one fourth chip, P=4. The rest can be deduced accordingly. Then the total hypothesis number is X×M×N×P.
The most intuitive method is to try all the hypotheses one by one if only one correlator is available in the receiver. If two correlators are available, then two hypotheses can be tried at the same time. Accordingly, the speed can be double. As can be understood, if the speed is to be considerably lifted, a great number of correlators are needed. This causes increases in cost and hardware complexity.
For a GPS signal, the chipping rate of pseudo-random code is 1.023 MHz, and the period thereof is 1023 chips, which is 1 millisecond. Therefore, a correlator having 1023 pairs of a multiplier and an adder is needed to correlate the received signal if the clock rate of the correlator is only 1 kHz. The searching rate is one hypothesis per millisecond. However, such a correlator, which has 1023 pairs of a multiplier and an adder, is too complex and the clock rate of 1 kHz is too slow in practice. The scale of the correlator can be reduced by increasing the clock rate to achieve the same effect. For example, if 33 kHz clock rate is used, than only 31 pairs of a multiplier and an adder are required.
As described above, the hardware complexity can be reduced by increasing the clock rate, but the hypothesis searching rate is still one hypothesis per millisecond. There are 1023 hypotheses in code phase domain for a specific satellite and a specific Doppler frequency. If the clock rate is further raised to 33 kHz×1023=33.759 MHz, then all code phase hypotheses for the satellite and the specific Doppler frequency can be tried in one millisecond. In some applications, higher accuracy is required, so that half chip spacing, for example, is necessary. Then there are 2046 hypotheses are to be tried in the code phase domain for a specific satellite and a specific Doppler frequency. Accordingly, the clock rate can be further raised to 33.759 MHz×2=67.518 MHz, and 2046 hypotheses are tried in one millisecond. As the clock rate increasing, additional memory capacity is required. However, this is not a big problem because memory is low-cost in comparison with multiplier or adder. In addition to increasing clock rate, it is necessary to properly arrange multiplexing of the searching capability for the respective domains so as to be adapted to various application conditions.